Overview

Unified Chip Design Platform - Memories.

Modules:

Name	Description
mem	Base Memory.
memtechconstraints	Technology Memory Segmentation Constraints.
otp	One-Time-Programmable Memory.
ram	Random-Access-Memory.
rom	Read-Only-Memory.
segmentation	Segmentation.
segmux	Segmentation Multiplexer.
types	Types.
util	Utilities.
wordmasks	Word Masks.

Classes:

Name	Description
AMemMod	Memory Module.
MemTechConstraints	Technology Memory Segmentation Constraints.
OtpMod	One-Time-Programmable Memory.
RamMod	Random-Access-Memory.
RomMod	Read-Only-Memory.
Segment	Memory Segment.
Segmentation	Memory Segmentation.
SegMuxMod	Segmentation Multiplexer.

AMemMod

Bases: ATailoredMod

Memory Module.

Methods:

Name	Description
get_pwrlanetype	Determine Power Lane Control Type.
get_overview	Overview.

Attributes:

Name	Type	Description
width	PositiveInt	Width in Bits.
depth	PositiveInt	Number of words.
size	Bytes	Size in Bytes.
slicewidths	SliceWidths | None	Data Slice Widths.
wordmasks	Wordmasks	Word Masks for 32-bit mapping.
accesslanes	Lanes	Access Lanes.
powerlanes	Lanes	Access Lanes.
iotype	LanesMemIoType	IO Type.
pwrtype	LanesMemPwrType	Power Control Type.
techtype	MemTechType	Technology Parameter Power.
addrspace	Addrspace	Address Space.
memtechconstraints	MemTechConstraints | None	Memory Technology Constraints.
segmentation	Segmentation	Physical Memory Segmentation.

width instance-attribute

width

Width in Bits.

depth class-attribute instance-attribute

depth = Field(repr=False)

Number of words.

size instance-attribute

size

Size in Bytes.

slicewidths class-attribute instance-attribute

slicewidths = None

Data Slice Widths.

wordmasks instance-attribute

wordmasks

Word Masks for 32-bit mapping.

accesslanes instance-attribute

accesslanes

Access Lanes.

powerlanes instance-attribute

powerlanes

Access Lanes.

iotype cached property

iotype

IO Type.

pwrtype cached property

pwrtype

Power Control Type.

techtype cached property

techtype

Technology Parameter Power.

addrspace cached property

addrspace

Address Space.

memtechconstraints abstractmethod cached property

memtechconstraints

Memory Technology Constraints.

segmentation cached property

segmentation

Physical Memory Segmentation.

get_pwrlanetype

get_pwrlanetype(lane)

Determine Power Lane Control Type.

get_overview

get_overview()

Overview.

MemTechConstraints

Bases: LightObject

Technology Memory Segmentation Constraints.

OtpMod

Bases: AMemMod

One-Time-Programmable Memory.

Attributes:

Name	Type	Description
memtechconstraints	MemTechConstraints | None	Memory Technology Constraints.

memtechconstraints cached property

memtechconstraints

Memory Technology Constraints.

RamMod

Bases: AMemMod

Random-Access-Memory.

Methods:

Name	Description
get_pwrlanetype	Determine Power Lane Control Type.

Attributes:

Name	Type	Description
retention	bool	Retention Capability.
memtechconstraints	MemTechConstraints | None	Memory Technology Constraints.

retention class-attribute instance-attribute

retention = False

Retention Capability.

memtechconstraints cached property

memtechconstraints

Memory Technology Constraints.

get_pwrlanetype

get_pwrlanetype(lane)

Determine Power Lane Control Type.

RomMod

Bases: AMemMod

Read-Only-Memory.

Methods:

Name	Description
get_pwrlanetype	Determine Power Lane Control Type.

Attributes:

Name	Type	Description
memtechconstraints	MemTechConstraints | None	Memory Technology Constraints.

memtechconstraints cached property

memtechconstraints

Memory Technology Constraints.

get_pwrlanetype

get_pwrlanetype(lane)

Determine Power Lane Control Type.

Segment

Bases: LightObject

Memory Segment.

Methods:

Name	Description
get_overview	Overview.

Attributes:

Name	Type	Description
x	NonNegativeInt	X-Coordinate aka Horizontal-Coordinate in Segmentation Matrix. Starting at 0. Growing to the LEFT.
y	NonNegativeInt	Y-Coordinate aka Vertical-Coordinate in Segmentation Matrix. Starting at 0. Growing to the BOTTOM.
slice_	Slice	Word Horizontal-Split.
offset	NonNegativeInt	Word Vertical-Addressing Offset in Matrix. Sum Of All Depths Of Segments With Y Smaller Than This Segment.
depth	PositiveInt	Number of Words.
width	PositiveInt	Width of One Word.
phydepth	PositiveInt	Number of Words, maybe a little bit more, to meet tech constraints.
phywidth	PositiveInt	Width of One Word, maybe a little bit more, to meet tech constraints.
wordslices	PositiveInt	Number of Access Slices to the Word.
pwrlane	Lane | None	Power Lane.
accesslane	Lane | None	Access Lane.
wordslicewidth		Word Slice Width.
phybits	int	Number of Bits.

x instance-attribute

x

X-Coordinate aka Horizontal-Coordinate in Segmentation Matrix. Starting at 0. Growing to the LEFT.

y instance-attribute

y

Y-Coordinate aka Vertical-Coordinate in Segmentation Matrix. Starting at 0. Growing to the BOTTOM.

slice_ instance-attribute

slice_

Word Horizontal-Split.

offset instance-attribute

offset

Word Vertical-Addressing Offset in Matrix. Sum Of All Depths Of Segments With Y Smaller Than This Segment.

depth instance-attribute

depth

Number of Words.

width instance-attribute

width

Width of One Word.

phydepth instance-attribute

phydepth

Number of Words, maybe a little bit more, to meet tech constraints.

phywidth instance-attribute

phywidth

Width of One Word, maybe a little bit more, to meet tech constraints.

wordslices class-attribute instance-attribute

wordslices = 1

Number of Access Slices to the Word.

pwrlane class-attribute instance-attribute

pwrlane = None

Power Lane.

accesslane class-attribute instance-attribute

accesslane = None

Access Lane.

wordslicewidth property

wordslicewidth

Word Slice Width.

phybits property

phybits

Number of Bits.

get_overview

get_overview()

Overview.

Segmentation

Bases: Object

Memory Segmentation.

Methods:

Name	Description
add_segment	Add memory segment.
lock	Lock And Check.
get_overview	Human readable summary.
create	Create Segmentation.

Attributes:

Name	Type	Description
segments	tuple[Segment, ...]	Segments.
rows	tuple[tuple[Segment, ...], ...]	Rows And Their Segments.
depths	tuple[int, ...]	Depths.
widths	tuple[int, ...]	Widths.
x_width	PositiveInt	Number of X-Segments.
y_width	PositiveInt	Number of Y-Segments.
gcd_depth	PositiveInt	Depths.
wordslices	PositiveInt	Wordslices.
size	Bytesize	Size in Bytes.
phybits	PositiveInt	Physical Size In Bits.
addrwidth	PositiveInt	Address width in bits.
is_trivial	bool	Segmentation Is Just A Pass-Through.

segments property

segments

Segments.

rows property

rows

Rows And Their Segments.

depths property

depths

Depths.

widths property

widths

Widths.

x_width property

x_width

Number of X-Segments.

y_width property

y_width

Number of Y-Segments.

gcd_depth property

gcd_depth

Depths.

wordslices property

wordslices

Wordslices.

size cached property

size

Size in Bytes.

phybits property

phybits

Physical Size In Bits.

addrwidth property

addrwidth

Address width in bits.

is_trivial property

is_trivial

Segmentation Is Just A Pass-Through.

add_segment

add_segment(
    x,
    y,
    depth,
    width,
    phydepth=None,
    phywidth=None,
    wordslices=1,
    pwrlane=None,
    accesslane=None,
)

Add memory segment.

Parameters:

Name	Type	Description	Default
x	NonNegativeInt	x-coordinate, starting at 0, along the width.	required
y	NonNegativeInt	y-coordinate, starting at 0, along the depth.	required
depth	PositiveInt	depth in words.	required
width	PositiveInt	width in bits.	required
phydepth	PositiveInt | None	physical depth in words, maybe a little bit more, to meet tech constraints	None
phywidth	PositiveInt | None	physical width in bits, maybe a little bit more, to meet tech constraints	None
wordslices	PositiveInt	'width' is cut into this number of slices.	1
pwrlane	Lane | None	Power Lane.	None
accesslane	Lane | None	Access Lane.	None

Rules:

* Segments with the same Y coordinate need to have the same depth.
* The width of all segments with the same Y need to sum up to the total width.
* The depth of all segments with the same X need to sum up to the total depth.

lock

lock()

Lock And Check.

get_overview

get_overview()

Human readable summary.

create staticmethod

create(
    width,
    depth,
    slicewidths=None,
    accesslanes=None,
    powerlanes=None,
    constraints=None,
)

Create Segmentation.

SegMuxMod

Bases: ATailoredMod

Segmentation Multiplexer.

Methods:

Name	Description
get_overview	Overview.
create	Create Segmentation Multiplexer if needed.

Attributes:

Name	Type	Description
intype	LanesMemIoType	In-IO Type.
outtype	SegmentsIoType	Out-IO Type.

intype cached property

intype

In-IO Type.

outtype cached property

outtype

Out-IO Type.

get_overview

get_overview()

Overview.

create classmethod

create(
    parent,
    name,
    segmentation,
    accesslanes,
    inroute,
    outroute,
    **kwargs,
)

Create Segmentation Multiplexer if needed.